ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 143

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.15.2
13.15.2.1
13.15.2.2
13.15.2.3
13.15.2.4
13.15.2.5
6430D–ATARM–25-Mar-11
SBFX
UBFX
SBFX and UBFX
Syntax
Operation
Restrictions
Condition flags
Examples
R0, R1, #20, #4
R8, R11, #9, #10 ; Extract bit 9 to bit 18 (10 bits) from R11 and zero
Signed Bit Field Extract and Unsigned Bit Field Extract.
where:
cond
Rd
Rn
lsb
width
SBFX extracts a bitfield from one register, sign extends it to 32 bits, and writes the result to the
destination register.
UBFX extracts a bitfield from one register, zero extends it to 32 bits, and writes the result to the
destination register.
Do not use SP and do not use PC
These instructions do not affect the flags.
SBFX{cond} Rd, Rn, #lsb, #width
UBFX{cond} Rd, Rn, #lsb, #width
; Extract bit 20 to bit 23 (4 bits) from R1 and sign
; extend to 32 bits and then write the result to R0.
; extend to 32 bits and then write the result to R8
is an optional condition code, see
is the destination register.
is the source register.
is the position of the least significant bit of the bitfield.
lsb must be in the range 0 to 31.
is the width of the bitfield and must be in the range 1 to 32− lsb.
.
“Conditional execution” on page
SAM3U Series
100.
143