ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 311

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.3.3
6430D–ATARM–25-Mar-11
Flash Commands
The Enhanced Embedded Flash Controller (EEFC) offers a set of commands such as program-
ming the memory Flash, locking and unlocking lock regions, consecutive programming and
locking and full Flash erasing, etc.
Commands and read operations can be performed in parallel only on different memory planes.
Code can be fetched from one memory plane while a write or an erase operation is performed
on another.
Table 21-2.
In order to perform one of these commands, the Flash Command Register (EEFC_FCR) has to
be written with the correct command using the FCMD field . As soon as the EEFC_FCR register
is written, the FRDY flag and the FVALUE field in the EEFC_FRR register are automatically
cleared. Once the current command is achieved, then the FRDY flag is automatically set. If an
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the corresponding interrupt
line of the NVIC is activated. (Note that this is true for all commands except for the STUI Com-
mand. The FRDY flag is not set when the STUI command is achieved.)
All the commands are protected by the same keyword, which has to be written in the 8 highest
bits of the EEFC_FCR register.
Writing EEFC_FCR with data that does not contain the correct key and/or with an invalid com-
mand has no effect on the whole memory plane, but the FCMDE flag is set in the EEFC_FSR
register. This flag is automatically cleared by a read access to the EEFC_FSR register.
When the current command writes or erases a page in a locked region, the command has no
effect on the whole memory plane, but the FLOCKE flag is set in the EEFC_FSR register. This
flag is automatically cleared by a read access to the EEFC_FSR register.
Command
Get Flash Descriptor
Write page
Write page and lock
Erase page and write page
Erase page and write page then lock
Erase all
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set GPNVM Bit
Clear GPNVM Bit
Get GPNVM Bit
Start Read Unique Identifier
Stop Read Unique Identifier
Set of Commands
Value
0x2
0x4
0x5
0x8
0x0
0x1
0x3
0x9
0xA
0xB
0xC
0xD
0xE
0xF
Mnemonic
GETD
WP
WPL
EWP
EWPL
EA
SLB
CLB
GLB
SGPB
CGPB
GGPB
STUI
SPUI
SAM3U Series
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