ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 104

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.11.1
13.11.1.1
13.11.1.2
13.11.1.3
13.11.1.4
13.11.1.5
104
ADR
SAM3U Series
ADR
Syntax
Operation
Restrictions
Condition flags
Examples
R1, TextMessage
Load PC-relative address.
where:
cond
Rd
label
ADR determines the address by adding an immediate value to the PC, and writes the result to
the destination register.
ADR produces position-independent code, because the address is PC-relative.
If you use ADR to generate a target address for a BX or BLX instruction, you must ensure that
bit[0] of the address you generate is set to1 for correct execution.
Values of label must be within the range of − 4095 to +4095 from the address in the PC.
You might have to use the .W suffix to get the maximum offset range or to generate addresses
that are not word-aligned. See
Rd must not be SP and must not be PC.
This instruction does not change the flags.
ADR{cond} Rd, label
is an optional condition code, see
is the destination register.
is a PC-relative expression. See
; Write address value of a location labelled as
; TextMessage to R1
“Instruction width selection” on page
“PC-relative expressions” on page
“Conditional execution” on page
102.
6430D–ATARM–25-Mar-11
100.
100.