ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 831

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

37.13 High Speed MultiMedia Card Interface (HSMCI) User Interface
Table 37-8.
Note:
6430D–ATARM–25-Mar-11
0x200-0x3FFC
0x100-0x124
0xEC - 0xFC
0x38 - 0x3C
0x58-0xE0
Offset
0x0C
0x1C
0x2C
0x4C
0xE4
0xE8
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
0x50
0x54
1. The response register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to 0x2C).
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD/SDIO Card Register
Argument Register
Command Register
Block Register
Completion Signal Timeout Register
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
DMA Configuration Register
Configuration Register
Reserved
Write Protection Mode Register
Write Protection Status Register
Reserved
Reserved
FIFO Memory Aperture
(1)
(1)
(1)
(1)
HSMCI_CSTOR
HSMCI_WPMR
HSMCI_CMDR
HSMCI_WPSR
HSMCI_ARGR
HSMCI_DTOR
HSMCI_SDCR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_BLKR
HSMCI_DMA
HSMCI_FIFO
HSMCI_RDR
HSMCI_CFG
HSMCI_TDR
HSMCI_IMR
HSMCI_IDR
HSMCI_IER
HSMCI_CR
HSMCI_MR
HSMCI_SR
Name
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Access
Write
Write
Read
Read
Read
Read
Read
Write
Read
Write
Write
Read
–
–
–
–
SAM3U Series
0xC0E5
Reset
0x00
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–
–
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