ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 103

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.11 Memory access instructions
6430D–ATARM–25-Mar-11
Table 13-17
Table 13-17. Memory access instructions
Mnemonic
ADR
CLREX
LDM{mode}
LDR{type}
LDR{type}
LDR{type}T
LDR
LDREX{type}
POP
PUSH
STM{mode}
STR{type}
STR{type}
STR{type}T
STREX{type}
shows the memory access instructions:
Brief description
Load PC-relative address
Clear Exclusive
Load Multiple registers
Load Register using immediate
offset
Load Register using register offset
Load Register with unprivileged
access
Load Register using PC-relative
address
Load Register Exclusive
Pop registers from stack
Push registers onto stack
Store Multiple registers
Store Register using immediate
offset
Store Register using register offset
Store Register with unprivileged
access
Store Register Exclusive
See
“ADR” on page 104
“CLREX” on page 118
“LDM and STM” on page 113
“LDR and STR, immediate offset” on
page 105
“LDR and STR, register offset” on page
108
“LDR and STR, unprivileged” on page
110
“LDR, PC-relative” on page 111
“LDREX and STREX” on page 116
“PUSH and POP” on page 115
“PUSH and POP” on page 115
“LDM and STM” on page 113
“LDR and STR, immediate offset” on
page 105
“LDR and STR, register offset” on page
108
“LDR and STR, unprivileged” on page
110
“LDREX and STREX” on page 116
SAM3U Series
103