ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 1055

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

41. 12-bit Analog-to-Digital Converter (ADC12B)
41.1
41.2
Figure 41-1. Analog-to-Digital Converter Block Diagram
6430D–ATARM–25-Mar-11
Analog
Inputs
AD12BVREF
AD12BTRG
VDDANA
AD12B0
AD12B1
AD12Bn
Description
Block Diagram
GND
PIO
The ADC12B is based on a Cyclic Pipeline 12-bit Analog-to-Digital Converter (ADC12B).
It also integrates an 8-to-1 analog multiplexer, making possible the analog-to-digital conversions
of 8 analog lines. The conversions extend from 0V to AD12BVREF.
The ADC12B supports a 10-bit or 12-bit resolution mode, and conversion results are reported in
a common register for all channels, as well as in a channel-dedicated register. Software trigger,
external trigger on rising edge of the AD12BTRG pin, internal triggers from Timer Counter out-
put(s) or PWM Event lines are configurable.
The ADC12B also integrates a Sleep Mode and a conversion sequencer and connects with a
PDC channel. These features reduce both power consumption and processor intervention.
This ADC12B has a selectable single-ended or fully differential input and benefits from a 2-bit
programmable gain. A whole set of reference voltage is generated internally from a single exter-
nal reference voltage node that may be equal to the analog supply voltage. An external
decoupling capacitance is required for noise filtering.
A digital error correction circuit based on the multi-bit redundant signed digit (RSD) algorithm is
employed in order to reduce INL and DNL errors.
Finally, the user can configure ADC12B timings, such as Startup Time and Sample & Hold Time.
Selection
Channels
Trigger
Counter
Timer
IN+
IN-
OFFSET
S/H
ADC12B
PGA
12-bit Analog-to-Digital
Cyclic Pipeline
Converter
Interface
Control
Logic
User
ADC12B Interrupt
PDC
SAM3U Series
NVIC
Peripheral Bridge
AHB
APB
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