ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 872

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

38.6.2.3
872
872
SAM3U Series
SAM3U Series
Dead-Time Generator
The dead-time generator uses the comparator output OCx to provide the two complementary
outputs DTOHx and DTOLx, which allows the PWM macrocell to drive external power control
switches safely. When the dead-time generator is enabled by setting the bit DTE to 1 or 0 in the
“PWM Channel Mode Register”
overlapping times) are inserted between the edges of the two complementary outputs DTOHx
and DTOLx. Note that enabling or disabling the dead-time generator is allowed only if the chan-
nel is disabled.
The dead-time is adjustable by the
puts of the dead-time generator can be adjusted separately by DTH and DTL. The dead-time
values can be updated synchronously to the PWM period by using the
Time Update Register”
The dead-time is based on a specific counter which uses the same selected clock that feeds the
channel counter of the comparator. Depending on the edge and the configuration of the dead-
time, DTOHx and DTOLx are delayed until the counter has reached the value defined by DTH or
DTL. An inverted configuration bit (DTHI and DTLI bit in the PWM_CMRx register) is provided
for each output to invert the dead-time outputs. The following figure shows the waveform of the
dead-time generator.
Figure 38-6. Complementary Output Waveforms
output waveform DTOHx
output waveform DTOHx
output waveform DTOHx
output waveform DTOHx
output waveform DTOLx
output waveform DTOLx
output waveform DTOLx
output waveform DTOLx
output waveform OCx
output waveform OCx
CPOLx = 0
CPOLx = 1
DTHIx = 0
DTHIx = 1
DTHIx = 0
DTHIx = 1
DTLIx = 0
DTLIx = 1
DTLIx = 0
DTLIx = 1
(PWM_DTUPDx).
DTHx
DTHx
(PWM_CMRx), dead-times (also called dead-bands or non-
“PWM Channel Dead Time Register”
DTLx
DTLx
(PWM_DTx). Both out-
“PWM Channel Dead
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11