TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 732

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

5. WdogRIS (Watchdog raw interrupt status)
6.
WdogMIS (Watchdog masked interrupt status)
[31:1]
[0]
[31:1]
[0]
[Description]
[Description]
Bit
a. <RAWWDTINT>
Bit
a. <WDTINT>
with the interrupt enable signal (WdogControl<INTEN>) to generate an interrupt
(WdogMIS<WDTINT>).
<RAWWDTINT> and WdogControl <INTEN> is read out.
Indicates the raw status of the WDT interrupt. The <RAWWDTINT> value is ANDed
This bit is status bit of the interrupt from WDT counter. The AND value of WdogRIS
RAWWDTINT
WDTINT
Symbol
Symbol
Bit
Bit
RO
RO
Type
Type
TMPA901CM- 731
Undefined
0y0
Undefined
0y0
Reset
Value
Reset
Value
Read as undefined.
WDT interrupt enabled status
0y0: No interrupt
0y1: Interrupt requested
Read as undefined.
WDT interrupt raw status
0y0: No interrupt
0y1: Interrupt requested
Address
Address
(0xF001_0000) + (0x0010)
(0xF001_0000) + (0x0014)
Description
Description
TMPA901CM
2010-07-29