TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 148

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
5. GPIODIBE (Port D Interrupt Select Register (Single edge and Both-edge))
6. GPIODIEV (Port D Interrupt Select Register (“Falling edge/Low level” and “Rising edge/High level”))
[31:8]
[7:6]
[5:0]
[31:8]
[7:6]
[5:0]
[Description]
[Description]
Bit
a. <PD7IBE to PD6IBE>
a. <PD7IEV to PD6IEV>
Bit
Interrupt both-edge register: Selects the trigger edge from single edge or both-edge.
0y0: Single edge
0y1: Both-edge
0y0: Falling edge/Low level
0y1: Rising edge/High level
Interrupt event register: Selects falling edge or rising edge for edge-sensitive interrupts,
and Low level or High level for level-sensitive interrupts.
PD7IEV to PD6IEV
Reserved
PD7IBE to D6IBE
Reserved
Symbol
Symbol
Bit
Bit
R/W
R/W
R/W
R/W
Type
Type
TMPA901CM-147
Undefined
0y00
0y000000
Undefined
0y00
0y000000
Reset
Value
Reset
Value
Read as undefined. Written as zero.
Port D interrupt event register (for each bit)
0y0: Falling edge/Low level
0y1: Rising edge/High level
Must be written as 0.
Read as 0.
Read as undefined. Written as zero.
Port D interrupt both-edge register (for each bit)
0y0: Single edge
0y1: Both-edge
Must be written as 0.
Read as0.
Address
Address
Description
Description
(0xF080_3000) + (0x080C)
(0xF080_3000) + (0x0808)
TMPA901CM
2010-07-29

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