TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 588

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
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[31:1]
[0]
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[0]
[Description]
[Description]
[Description]
a. <I2STx_FIFOCLR>
a. <I2SRx_ FIFOCLR>
a. <I2SRx_MASTER>
Bit
Bit
Bit
5.
6.
7.
Do not clear the FIFO during DMA transfer as it may destroy the transmit data.
This bit is always read as 0.
Do not clear the FIFO during DMA transfer as it may destroy the receive data.
This bit is always read as 0.
Selects between receive master and receive slave.
I2SCOMMON<COMMON> is set to 1, this bit selects between full-duplex master and
full-duplex slave.
I2STFCLR (Tx FIFO Clear Register)
I2SFRFCLR (Rx FIFO Clear Register)
I2SRMS (Rx Master/Slave Register)
I2STx_FIFOCLR
I2SRx_FIFOCLR
I2SRx_MASTER
Bit Symbol
Bit Symbol
Bit Symbol
R/W
R/W
R/W
Type
Type
Type
TMPA901CM- 587
Undefined
0y0
Undefined
0y0
Undefined
0y0
Reset
Reset
Reset
Value
Value
Value
Master/slave select
0y0: Slave
0y1: Master (Internally generated I2S0WS and
Read as undefined. Write as zero.
FIFO Pointer clear
0y0: Invalid
0y1: FIFO Pointer clear
Read as undefined. Write as zero.
FIFO Pointer clear
0y0: Invalid
0y1: FIFO Pointer clear
Read as undefined. Write as zero.
I2S0SCLK are output to an external device.)
Address
Address
Address
Description
Description
Description
(0xF204_0000) + (0x002C)
(0xF204_0000) + (0x0008)
(0xF204_0000) + (0x0028)
TMPA901CM
2010-07-29

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