TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 307

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

2) Periodic timer mode
When the counter value reaches 0, an interrupt is generated.
decrementing if Wrapping-operation is enabled (Timer0Control<TIM0OSCTL> = 0).
Therefore, interrupts are generated at fixed intervals.
0x0000003F.
(2) Wrapping-operation
When the timer starts counting, the counter value decrements from the initially set value.
If setting to the One-shot-operation (Timer0Control<TIM0OSCTL> = 1), the interrupt is
generated once.
Upon reaching 0, the counter is reloaded with the initially set value and continues
The following shows an example where the 8-bit counter and timer value is set to
(1) One-shot-operation
Timer counter
value
Timer counter
value
INTS [2]
0x003F
0x0000
INTS [2]
0x00FF
0x003F
0x0000
TMPA901CM- 306
Timer interrupt is generated when
the counter value is cleared.
Cleared by setting interrupt clear
register TimerxIntClr
Timer interrupt is generated when the
counter value is cleared.
Cleared by setting interrupt clear
register TimerxIntClr
TMPA901CM
2010-07-29
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