TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 364

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

24. UART0ICR (UART0 Interrupt clear register)
[31:11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bit
Note: The UART0ICR register is a write-only interrupt clear register. When a bit of this register is set to 1, the
associated interrupt is cleared. A write of 0 to any bit of this register is invalid.
OEIC
BEIC
PEIC
FEIC
RTIC
TXIC
RXIC
Reserved
Reserved
Reserved
Reserved
Symbol
Bit
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Type
TMPA901CM- 363
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Reset
Value
Read as undefined. Write as zero.
Overrun error interrupt clear
0y0: Invalid
0y1: Clear
Break error interrupt clear
0y0: Invalid
0y1: Clear
Parity error interrupt clear
0y0: Invalid
0y1: Clear
Framing error interrupt clear
0y0: Invalid .
0y1: Clear.
Receive timeout interrupt clear
0y0: Invalid
0y1: Clear
Transmit interrupt clear
0y0: Invalid
0y1: Clear
Receive interrupt clear
0y0: Invalid
0y1: Clear
Write as zero.
Write as zero.
Write as zero.
Write as zero.
Address
Description
(0xF200_0000) + (0x0044)
TMPA901CM
2010-07-29