TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 484

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

Note: When UDC2AB is used in the EOP Disable mode, short packets will not be sent out even if the data string to
be sent has been transferred. EOP Disable mode should be used only in case the size of the data string is a
multiple of the maximum packet size.
The mode can be used if the total size of data string is a multiple of the maximum packet size. For example,
the following transfer may be allowed:
Example:
A transfer of 512 bytes will be made twice for the IN transfer.
Size of the first Master Read transfer: 1000 bytes
Size of the second Master Read transfer: 24 bytes (Total of first and second transfers = 1024 bytes)
Maximum packet size: 512 bytes
Read EOP disable) are described here. Master Read operations will be as follows:
Master Read transfers when UDC2STSET<eopb_enable > is set to 0 (Master
EOP Disable mode
1. Set Master Read Start Address and Master Read End Address registers.
2. Set the register associated to the Master Read operation of DMAC Setting
3. UDC2AB starts the data transfer to the endpoint of UDC2. UDC2
4. When reached the Master Read end address, UDC2AB asserts the
5. After the handling by the software ended, return to 1.
register and set 1 to the mr_enable bit.
transfers the data to the IN token from the USB host.
int_mr_end_add interrupt. If the FIFO of the endpoint is as full as the
maximum packet size in a Master Read transfer, the data will be
transferred to the IN token from the USB host. If not, the data will remain
in the FIFO and will be carried over to the next transfer.
TMPA901CM- 483
TMPA901CM
2010-07-29