TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 130

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

6. GPIOARIS (Port A Interrupt Status Register (Raw))
7. GPIOAMIS (Port A Interrupt Status Register (Masked))
[31:4]
[3:0]
[31:4]
[3:0]
[Description]
[Description]
Bit
Bit
a. <PA3RIS to PA0RIS>
a. <PA3MIS to PA0MIS>
Interrupt raw status register: Monitors the interrupt status before being masked by the
interrupt enable register.
0y0: Not requested
0y1: Requested
Masked interrupt status register: Monitors the interrupt status after masking.
0y0: Not requested
0y1: Requested
PA3MIS to PA0MIS
PA3RIS to PA0RIS
Symbol
Symbol
Bit
Bit
RO
RO
Type
Type
TMPA901CM-129
Undefined
0x0
Undefined
0x0
Reset
Value
Reset
Value
Read as undefined.
Port A interrupt raw status register (for each bit)
0y0: Not requested
0y1: Requested
Read as undefined.
Port A masked interrupt status register
(for each bit)
0y0: Not requested
0y1: Requested
Address
Address
Description
Description
(0xF080_0000) + (0x0814)
(0xF080_0000) + (0x0818)
TMPA901CM
2010-07-29