TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 439

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.16.2.5 Registers
UDINTSTS
UDINTENB
UDMWTOUT
UDC2STSET
UDMSTSET
DMACRDREQ
DMACRDVL
UDC2RDREQ
UDC2RDVL
Reserved
ARBTSET
UDMWSADR
UDMWEADR
UDMWCADR
UDMWAHBADR
UDMRSADR
UDMREADR
UDMRCADR
UDMRAHBADR
Reserved
UDPWCTL
UDMSTSTS
UDTOUTCNT
Reserved
(1) Register map
setting UDC2. When the registers for setting UDC2 are accessed, UDC2AB
automatically accesses UDC2 via PVCI I/F. Each register has the width of 32 bits.
Register Name
The register map of UDC2AB consists of registers for setting UDC2AB and those for
The register map of UDC2AB is shown below.
Table 3.16.1 UDC2AB/UDC2 register map (1/2)
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024 to 0x0038 *4)
0x003C
0x0040
0x0044
0x0048
0x004C
0x0050
0x0054
0x0058
0x005C
0x0060 to 0x007C
0x0080
0x0084
0x0088
0x008C to 0x1FC *4)
Address (base +)
TMPA901CM- 438
*1)
*1)
*1)
Interrupt Status Register
Interrupt Enable Register
Master Write Timeout Register
UDC2 Setting Register
DMAC Setting Register
DMAC Read Request Register
DMAC Read Value Register
UDC2 Read Request Register
UDC2 Read Value Register
Arbiter Setting Register
Master Write Start Address Register
Master Write End Address Register
Master Write Current Address Register
Master Write AHB Address Register
Master Read Start Address Register
Master Read End Address Register
Master Read Current Address Register
Master Read AHB Address Register
Power Detect Control Register
Master Status Register
Timeout Count Register
Description
Base address = 0xF440_0000
TMPA901CM
2010-07-29