TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 591
TMPA901CMXBG
Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet
1.TMPA901CMXBG.pdf
(858 pages)
Specifications of TMPA901CMXBG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
Details
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[31:1]
[0]
[Description]
a. <I2SRx_MSTP>
Bit
9.
This bit is used to stop (= Fixed Low level) I2S0WS and I2S0SCLK from the master. It is
not normally used.
Before setting this register, make sure that I2SRx is in the SBY state
(I2SRST<I2SRx_STATUS[1:0]>=0y00). Operation is not guaranteed in other cases.
The default setting is not to stop I2S0WS and I2S0SCLK. Therefore, after master-related
settings are made, I2S0WS and I2S0SCLK are immediately output.
I2SRMSTP (Rx Master Stop Register)
I2SRx_MSTOP
Bit Symbol
R/W
Type
TMPA901CM- 590
Undefined
0y0
Reset
Value
Read as undefined. Write as zero.
0y0: Do not stop I2S0WS/I2S0SCLK
0y1: Stop I2S0WS/I2S0SCLK
(I2S0WS/I2S0SCLK = 0)
I2SRx master stop:
Address
(0xF204_0000) + (0x0034)
Description
TMPA901CM
2010-07-29
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