TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 407

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

SCL
SDA
I2C0DA
I2C0SR<AD0>
I2C0SR<AAS>
I2CINT0 interrupt request
3.14.6.12 General Call Detection Monitor
slave address match in slave mode.
received immediately after a start condition are all 0s) is received. (At this time,
I2C0SR<AAS> is also set to 1.)
call detection. I2C0SR<AD0> remains 0 even if a general call is received. (At this time,
I2C0SR<AAS> also remains 0.)
I
When I2C0CR1<NOACK> = 0, I2C0SR<AD0> is set to 1 when a general call (8 bits
Setting I2C0CR1<NOACK> to 1 disables the slave address match detection and general
I2C0SR<AD0> is cleared to 0 when a start or stop condition is detected on the bus.
2
C bus mode (I2C0AR<ALS> = 0) also allows the detection of a general call as well as
Start condition
Figure 3.14.21 Changes in the general call detection monitor
1
2
3
TMPA901CM- 406
General call
4
5
6
I2C0DBR write or read
7
8
ACK output
9
Stop condition
TMPA901CM
2010-07-29