TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 227

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

Register
address
0x0014
0x0018
0x001C
0x0020
0x0024
0x0028
0x002C
0x0030
0x0034
0x0038
0x003C
0x0040
0x0044
0x0048
0x000C
0x0010
0x0200
0x0008
0x0008
0x0008
0x0008
0x0008
0x0008
0x0008
0x0008
0x0004
0x00000004
0x00000001
0x00000002
0x00000007
0x0000000B
0x00000015
0x000001F2
0x00000015
0x00000002
0x00000003
0x00000002
0x00000001
0x0000000A
0x00000014
0x00010009
0x00000640
0x000000FF
0x000C0000
0x00000000
0x00090000
0x00080122
0x00000000
0x00040000
0x00040000
0x00080032
0x00000000
Write data
Set cas_latency to 2
Set t_dqss to 1
Sett_mrd to 2
Sett_ras to 7
Set t_rc to 11
Set t_rcd to 5 and schedule_rcdto 2
Set t_rfc to 18 and schedule_rfcto 15
Set t_rp to 5 and schedule_rpto 2
Set t_rrd to 2
Set t_wrto 3
Set t_wtr to 2
Set t_xp to 1
Set t_xsr to 10
Set t_esr to 20
Set memory configuration
Set auto refresh time to be every 1600 DMCSCLK periods
Set chip select for chip 0 to be 0x00XXXXXX, rbc configuration
Carry out chip 0 Nopcommand
Carry out chip 0 Prechargeall command
Extended mode register setup
Mode register setup
Precharge all
Carry out chip 0 Autorefresh command
Carry out chip 0 Autorefresh command
Carry out chip 0 Mode Reg command 0x32 mapped to low add bits
Change DMC state to ready
Table 3.10.9 Example DDR memory setup
TMPA901CM-226
Description
Base address = 0xF431_0000
TMPA901CM
2010-07-29