TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 621

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

Panel data
LCD [15:0]
Panel clock
LCLLP
LcdVcomp interrupt timing
(This timing delay about 3 HCLK from LCLLP edge)
Signal name
Vertical sync
signal
LCLFP
Back porch start
Front porch start
Vertical sync start
Display data start
[Description]
a. <WATERMARK>
b. <LcdVComp>
LCD DMA FIFO watermark level
0y0: Requests DMA when space of 4 words or more occurs in either of the two FIFOs.
0y1: Requests DMA when space of 8 words or more occurs in either of the two FIFOs.
0y00: At vertical sync start
0y01: At back porch start
0y10: At display data start
0y11: At front porch start
Following timing chart shows interrupt generation timing .
(Vertical sync
VSW + 1
pulse)
Vertical non-data area
(Vertical back porch)
VBP
TMPA901CM- 620
(Number of lines per panel)
LPP + 1
(Vertical front porch)
Vertical non-data area
VFP
TMPA901CM
2010-07-29