TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 403

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

I2C0SR<PIN>
I2C0CL
I2CINT0 interrupt request signal
3.14.6.7 Interrupt Service Request and Cancel
I2C0CR1<ACK> have been transferred, an I2CINT0 interrupt request is generated.
conditions in addition to the above condition:
I2C0SR<PIN> is 0, I2C0CL is pulled low.
I2C0CR2<PIN> can be set to 1 by writing 1 whereas it cannot be cleared to 0 by writing 0.
•
•
•
In master mode, after the number of bits specified by I2C0CR1<BC> and
In slave mode, an I2CINT0 interrupt request is also generated by the following
When an I2CINT0 interrupt request is generated, I2C0SR<PIN> is cleared to 0. While
Writing data into I2C0DBR sets I2C0SR<PIN> to 1.
It takes the t
1
When I2C0CR1<NOACK> is 0, after the acknowledge signal is output to indicate
that the received slave address has matched the slave address set in I2C0AR<SA>
When I2C0CR1<NOACK> is 0, after the acknowledge signal is output to indicate
that a general call has been received.
When data transfer is completed after a matched slave address or a general call is
received.
2
LOW
Figure 3.14.17 I2C0SR<PIN> and I2C0CL
3
period for I2C0CL to be released after I2C0SR<PIN> is set to 1.
TMPA901CM- 402
7
8
9
I2C0CL is pulled
low while
I2C0SR<PIN> = 0.
t
LOW
or a write to I2C0DBR
I2C0CR2<PIN> = 1
1
TMPA901CM
2010-07-29