TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 535

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

[31:16]
[15]
[14:13]
[12]
[11]
[10:0]
Bit
tx_0data
dset
max_pkt[10:0]
[Description]
a. <tx_0data>
b. <dset>
c.
Note 1: The initial value of dset (bit 12) after reset_x is 1 when the EPx is a transmit endpoint, while it is 0 when the
Note 2: The initial value of dset (bit 12) after USB_RESET is 1 when the EPx is a transmit endpoint, while it is "Retain"
Note 3: Since the register structure is identical for all EPs through EP1 and EP3, only EP1 is described here.
Note 4: When EP3 is used in Dual, the maximum size of 1 packet is 32bytes.
Note: For details, refer to section 3.16.4.2 “Appendix B About Setting an Odd Number of Bytes as MaxPacketSize”.
Symbol
When the “EP1_TX_0DATA” command is issued to EP1 by Command register or
Zero-Length data has been set at Endpoint-I/F, this bit will be set to 1. It will be cleared to
0 after the Zero-Length data has been transmitted.
Indicates the status of EP1_FIFO.
0y0: No valid data exists
0y1: Valid data exists
<max_pkt[10:0]>
Sets MaxPacketSize of EP1.
Set this when configuring the endpoint when Set_Configuration and Set_Interface are
received.
Set an even number for a transmit endpoint. On USB, when MaxPacketSize of a transmit
endpoint is an odd number, set an even number to max_pkt and make the odd number of
accesses to the endpoint. (For instance, set 1024 to max_pkt when the MaxPacketSize
should be 1023 bytes.)
(5) EP1 Control/Status Registers
1.
Bit
EPx is a receive endpoint.
when the EPx is a receive endpoint.
Addresses of registers for EP2 and EP3 can be confirmed in the register map.
UD2EP1MSZ (EP1_MaxPacketSize register)
RO
RO
R/W
Type
Undefined
0y0
Undefined
Note 1,Note 2
Undefined
0y00000000000
(-)(-)(-)(-)(-)(-)
(-)(-)(-)(-)(-)
Reset
Value
TMPA901CM- 534
Read as undefined. Write as zero.
When the "EP1_TX_0DATA" command is issued to EP1 by
Command register or Zero-Length data has been set at
Endpoint-I/F, this bit will be set to 1. It will be cleared to 0 after
the Zero-Length data has been transmitted.
Read as undefined. Write as zero.
Indicates the status of EP1_FIFO.
0y0: No valid data exists
0y1: Valid data exists
Read as undefined. Write as zero.
Sets MaxPacketSize of EP1.
Note: See 3.16.4.2 Appendix B About Setting an Odd Number
of Bytes as MaxPacketSize for more information.
Address = (0xF440_0000) + (0x0240)
Description
TMPA901CM
2010-07-29