TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 714

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

1. ADREG4L (AD conversion result lower-order register 4
[31:8]
[7]
[6]
[5:2]
[1]
[0]
Bit
[Description]
a. <ADR4[1:0]>
b. <OVR4>
c. <ADR4RF>
Note : As ADREG4L to ADREG7L and ADREGSPL Registers are the same composition. Explain Register
higher-order/lower-order registers ADREG4H/L to ADREG7H/L. Top-priority conversion
results are stored in ADREGSPH/L. Since these registers are structured the same,
ADREG4 that is the conversion result storage register for the 4 channel is shown below:
AD conversion result register.
They are AD conversion result lower-order bits 1 to 0.
Used for the overrun flag.
0y0: No overrun occurred
0y1: Overrun occurred
Used for the AD conversion result storage flag.
0y0: No change result
0y1: With conversion result
A/D conversion results are stored in the four registers of A/D conversion result
ADR41
ADR40
OVR4
ADR4RF
About the address of ADREG4L to ADREG7L and ADREGSPL Register, please check Register Map.
ADREG4L only, the other Registers are same as ADREG4L.
Symbol
Bit
RO
RO
RO
RO
RO
Type
Undefined
0y0
0y0
0y0000
0y0
0y0
TMPA901CM- 713
Reset
Value
Read as undefined.
AD conversion result lower-order bit 1
AD conversion result lower-order bit 0
Always read as 0 when read.
Overrun flag
0y0: No overrun occurred
0y1: Overrun occurred
AD conversion result storage flag
0y0: No change result
0y1: With conversion result
Description
Address
(0xF008_0000) + (0x0020)
TMPA901CM
2010-07-29