TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 465

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

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Bit
[Description]
mwcadr
a. <mwcadr>
13. UDMWCADR (Master Write Current Address register)
Symbol
Displays the addresses to which transfers from endpoints to the Master Write buffers
have been currently completed in Master Write transfers. This can be used in case a
timeout interrupt has occurred or an error occurred during the transfer process.
This address is incremented at the point when the data is set from the endpoint to the
Master Write buffer, while the data will reside inside the target device or the Master
Write buffer during the Master Write transfer process until the displayed address.
Bit
have been currently completed in Master Write transfers (UDC2 to AHB).
a value to the DMAC Read Request register and then read the value from the DMAC
Read Value register.
Displays the address to which transfers from endpoints to the Master Write buffers
This register cannot be read by directly specifying the address. In order to read it, set
RO
Type
0x00000000
TMPA901CM- 464
Reset
Value
Master Write current address
Address =(0xF440_0000)+ (0x0048)
Description
TMPA901CM
2010-07-29