DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 92

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 3 Exception Handling
3.8
3.8.1
When word data is accessed in this LSI, the least significant bit of the address is regarded as 0.
Access to the stack always takes place in word size, so the stack pointer (SP: R7) should never
indicate an odd address. To save register values, use PUSH.W Rn (MOV.W Rn, @–SP) or
PUSH.L ERn (MOV.L ERn, @–SP). To restore register values, use POP.W Rn (MOV.W @SP+,
Rn) or POP.L ERn (MOV.L @SP+, ERn).
Setting an odd address in SP may cause a program to crash. An example is shown in figure 3.6.
When CCR contents are saved to the stack during interrupt exception handling or restored when
an RTE instruction is executed, this also takes place in word size. Both the upper and lower bytes
of word data are saved to the stack; on return, the even address contents are restored to CCR while
the odd address contents are ignored.
Rev. 3.00 May 15, 2007 Page 58 of 516
REJ09B0152-0300
SP
Notes on Stack Area Use
Usage Notes
[Legend]
PC H :
PC L :
R1L:
SP:
SP set to H'FEFF
Upper byte of program counter
Lower byte of program counter
General register R1L
Stack pointer
Figure 3.6 Operation when Odd Address is Set in SP
BSR instruction
SP
Stack accessed beyond SP
PC
PC
H
L
MOV. B R1L, @-R7
SP
Contents of PC are lost
R1L
PC
L
H
H'FEFC
H'FEFD
H'FEFF

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