DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 265

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

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Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
The serial communication interface 3 (SCI3) can handle both asynchronous and clock
synchronous serial communication. In the asynchronous method, serial data communication can
be carried out using standard asynchronous communication chips such as a Universal
Asynchronous Receiver/Transmitter (UART) or an Asynchronous Communication Interface
Adapter (ACIA).
The SCI3 can transmit and receive IrDA communication waveforms based on the Infrared Data
Association (IrDA) standard version 1.0.
14.1
• Choice of asynchronous or clock synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• On-chip baud rate generator, internal clock, or external clock can be selected as a transfer
• Six interrupt sources
• Use of module standby mode enables this module to be placed in standby mode independently
Asynchronous mode
• Data length: 7, 8, or 5 bits
• Stop bit length: 1 or 2 bits
• Parity: Even, odd, or none
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the RXD3 pin level directly in the case of a
SCI0012A_000020020900
Section 14 Serial Communication Interface 3 (SCI3, IrDA)
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously.
Double-buffering is used in both the transmitter and the receiver, enabling continuous
transmission and continuous reception of serial data.
clock source.
Transmit-end, transmit-data-empty, receive-data-full, overrun error, framing error, and parity
error.
when not used. (The SCI3 is halted as the initial value. For details, refer to section 5.4, Module
Standby Function.)
framing error
Features
Section 14 Serial Communication Interface 3 (SCI3, IrDA)
Rev. 3.00 May 15, 2007 Page 231 of 516
REJ09B0152-0300

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