DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 325

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

15.3.5
SSSR is a register that sets interrupt flags.
Bit
7
6
5, 4
3
Bit Name
—
ORER

TEND
SS Status Register (SSSR)
Initial
Value
0
0
All 0
0
R/W
—
R/(W)* Overrun Error Flag

R/(W)* Transmit End
Description
Reserved
This bit is always read as 0.
Indicates that the RDRF bit is abnormally terminated in
reception because an overrun error has occurred.
SSRDR retains received data before the overrun error
occurs and the received data after the overrun error
occurs is lost. When this bit is set to 1, subsequent serial
reception cannot be continued. When the MSS bit in
SSCRH is 1, this is also applied to serial transmission.
[Setting condition]
•
[Clearing condition]
•
Reserved
These bits are always read as 0.
[Setting condition]
•
[Clearing conditions]
•
•
When the next serial reception is completed while
RDRF = 1
When 0 is written to this bit after reading 1
When the last bit of data is transmitted, the TDRE bit
is 1
When 0 is written to this bit after reading 1
When data is written in SSTDR
Section 15 Synchronous Serial Communication Unit (SSU)
Rev. 3.00 May 15, 2007 Page 291 of 518
REJ09B0152-0300