DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 116

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

Section 5 Power-Down Modes
• CKSTPR2
Notes: 1. When the SCI3 module standby is set, all registers in the SCI3 enter the reset state.
Rev. 3.00 May 15, 2007 Page 82 of 516
REJ09B0152-0300
Bit
7
6
5
4
3
2
1
0
2. When using the on-chip emulator, set this bit to 1.
3. This bit is valid when the WDON bit in TCSRW is 0. If this bit is cleared to 0 while the
Bit Name

SSUCKSTP
COMPCKSTP

TWCKSTP
IICCKSTP
AECCKSTP
WDCKSTP
WDON bit is set to 1 (while the watchdog timer is operating), this bit is cleared to 0.
However, the watchdog timer does not enter module standby mode and continues
operating. When the WDON bit is cleared to 0 by software, this bit is valid and the
watchdog timer enters module standby mode.
Initial
Value
0
0
0
0
0
1
0
0
R/W

R/W
R/W
R/W
R/W
R/W*
R/W

3
Description
Reserved
This bit is always read as 0 and cannot be modified.
Timer W Module Standby
Timer W enters standby mode when this bit is cleared
to 0.
IIC2 Module Standby
The IIC2 enters standby mode when this bit is cleared
to 0.
SSU Module Standby
The SSU enters standby mode when this bit is cleared
to 0.
Asynchronous Event Counter Module Standby
The asynchronous event counter enters standby mode
when this bit is cleared to 0.
Watchdog Timer Module Standby
The watchdog timer enters standby mode when this bit
is cleared to 0.
Comparator Module Standby
The comparators enter standby mode when this bit is
cleared to 0.
Reserved
This bit is always read as 0 and cannot be modified.