DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 214

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 10 Timer W
10.5.7
If a general register (GRA, GRB, GRC, or GRD) is used as an input capture register, the
corresponding IMFA, IMFB, IMFC, or IMFD flag is set to 1 when an input capture occurs. Figure
10.22 shows the timing of the IMFA to IMFD flag setting at input capture.
10.5.8
When the CPU reads a status flag while it is set to 1, then writes 0 in the status flag, the status flag
is cleared. Figure 10.23 shows the status flag clearing timing.
Rev. 3.00 May 15, 2007 Page 180 of 516
REJ09B0152-0300
Timing of IMFA to IMFD Setting at Input Capture
Timing of Status Flag Clearing
Figure 10.22 Timing of IMFA to IMFD Flag Setting at Input Capture
φ
Input capture
signal
TCNT
GRA to GRD
IMFA to IMFD
IRRTW
Address
Write signal
IMFA to IMFD
IRRTW
φ
Figure 10.23 Timing of Status Flag Clearing by CPU
N
TSRW write cycle
TSRW address
T1
T2
N

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