DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 137
![MCU 3V 16K 32-QFN](/photos/12/38/123805/32-qfn_pkg_sml.jpg)
DF38602RFT10
Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet
1.DF38602RFT10.pdf
(554 pages)
Specifications of DF38602RFT10
Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10
HD64F38602RFT10
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
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6.2.3
EBR1 specifies the erase block of flash memory. EBR1 is initialized to H'00 when the SWE bit in
FLMCR1 is 0. Do not set more than one bit at a time, as this will cause all the bits in EBR1 to be
automatically cleared to 0.
6.2.4
FLPWCR enables or disables a transition to the flash memory power-down mode when this LSI
enters the subactive mode. There are two modes: mode in which operation of the power supply
circuit of flash memory is partly halted in power-down mode and flash memory can be read, and
mode in which even if a transition is made to subactive mode, operation of the power supply
circuit of flash memory is retained and flash memory can be read.
Bit
7 to 5
4
3
2
1
0
Bit
7
6 to 0
Bit Name
EB4
EB3
EB2
EB1
EB0
Bit Name
PDWND
Erase Block Register 1 (EBR1)
Flash Memory Power Control Register (FLPWCR)
Initial
Value
All 0
0
0
0
0
0
Initial
Value
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
Although these bits are readable/writable, only 0 should
be written to.
When this bit is set to 1, a12-Kbyte area of H'1000 to
H'3FFF will be erased.
When this bit is set to 1, a 1-Kbyte area of H'0C00 to
H'0FFF will be erased.
When this bit is set to 1, a 1-Kbyte area of H'0800 to
H'0BFF will be erased.
When this bit is set to 1, a 1-Kbyte area of H'0400 to
H'07FF will be erased.
When this bit is set to 1, a 1-Kbyte area of H'0000 to
H'03FF will be erased.
Description
Power-Down Disable
When this bit is 0 and a transition is made to subactive
mode, the flash memory enters the power-down mode.
When this bit is 1, the flash memory remains in the
normal mode even after a transition is made to subactive
mode.
Reserved
These bits are always read as 0.
Rev. 3.00 May 15, 2007 Page 103 of 518
REJ09B0152-0300
Section 6 ROM
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