DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 324

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 15 Synchronous Serial Communication Unit (SSU)
15.3.4
SSER is a register that sets transmit enable, receive enable, and interrupt enable.
Rev. 3.00 May 15, 2007 Page 290 of 516
REJ09B0152-0300
Bit
7
6
5
4
3
2
1
0
Bit Name
TE
RE
RSSTP
TEIE
TIE
RIE
CEIE
SS Enable Register (SSER)
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Transmit enable
When this bit is 1, transmit operation is enabled.
Receive enable
When this bit is 1, receive operation is enabled.
Receive single stop
When this bit is 1, receive operation is completed after
receiving one byte.
Reserved
This bit is always read as 0.
Transmit End Interrupt Enable
When this bit is set to 1, a TEI interrupt request is
enabled.
Transmit Interrupt Enable
When this bit is set to 1, a TXI interrupt request is
enabled.
Receive Interrupt Enable
When this bit is set to 1, an RXI and an OEI interrupt
requests are enabled.
Conflict Error Interrupt Enable
When this bit is set to 1, a CEI interrupt request is
enabled.

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