DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 31

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 1 Overview
Table 1.1
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.12
Section 3 Exception Handling
Table 3.1
Table 3.2
Table 3.3
Table 3.4
Section 4 Clock Pulse Generators
Table 4.1
Section 5 Power-Down Modes
Table 5.1
Table 5.2
Table 5.3
Section 6 ROM
Table 6.1
Table 6.2
Table 6.3
Table 6.4
System Clock Frequencies for which Automatic Adjustment of
LSI Bit Rate is Possible......................................................................................... 108
Pin Functions ............................................................................................................ 4
Operation Notation ................................................................................................. 16
Data Transfer Instructions....................................................................................... 17
Arithmetic Operations Instructions (1) ................................................................... 18
Arithmetic Operations Instructions (2) ................................................................... 19
Logic Operations Instructions................................................................................. 20
Shift Instructions..................................................................................................... 20
Bit Manipulation Instructions (1)............................................................................ 21
Bit Manipulation Instructions (2)............................................................................ 22
Branch Instructions ................................................................................................. 23
System Control Instructions.................................................................................... 24
Block Data Transfer Instructions ............................................................................ 25
Addressing Modes .................................................................................................. 27
Absolute Address Access Ranges ........................................................................... 29
Effective Address Calculation (1)........................................................................... 30
Effective Address Calculation (2)........................................................................... 31
Exception Sources and Vector Address .................................................................. 42
Reset Sources.......................................................................................................... 44
Pin Configuration.................................................................................................... 46
Interrupt Wait States ............................................................................................... 57
Methods for Selecting System Clock Oscillator and On-Chip Oscillator............... 67
Operating Frequency and Waiting Time................................................................. 79
Transition Mode after SLEEP Instruction Execution and Interrupt Handling ........ 85
Internal State in Each Operating Mode................................................................... 86
Setting Programming Modes ................................................................................ 104
Boot Mode Operation ........................................................................................... 107
Reprogramming Data Computation Table ............................................................ 111
Tables
Rev. 3.00 May 15, 2007 Page xxix of xxxii

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