DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 239

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
12.2.2
TCSRWD2 performs the TCSRWD2 write control, mode switching, and interrupt control.
TCSRWD2 must be rewritten by using the MOV instruction. The bit manipulation instruction
cannot be used to change the setting value.
Bit
7
6
5
4
3
Timer Control/Status Register WD2 (TCSRWD2)
Bit Name
OVF
B5WI
WT/IT
B3WI
IEOVF
Initial
Value
0
1
0
1
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
1
2
3
2
3
Description
Overflow Flag
Indicates that TCWD has overflowed (changes from H'FF
to H'00).
[Setting condition]
When TCWD overflows (changes from H'FF to H'00)
When internal reset request generation is selected in
watchdog timer mode, this bit is cleared automatically by
the internal reset after it has been set.
[Clearing condition]
Bit 5 Write Inhibit
The WT/IT bit can be written only when the write value of
the B5WI bit is 0. This bit is always read as 1.
Timer Mode Select
Selects whether the WDT is used as a watchdog timer or
interval timer.
0: Watchdog timer mode
1: Interval timer mode
Bit 3 Write Inhibit
The IEOVF bit can be written only when the write value of
the B3WI bit is 0. This bit is always read as 1.
Overflow Interrupt Enable
Enables or disables an overflow interrupt request in
interval timer mode.
0: Disables an overflow interrupt
1: Enables an overflow interrupt
When TCSRWD2 is read when OVF = 1, then 0 is
written to OVF
Rev. 3.00 May 15, 2007 Page 205 of 518
Section 12 Watchdog Timer
REJ09B0152-0300

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