DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 531
![MCU 3V 16K 32-QFN](/photos/12/38/123805/32-qfn_pkg_sml.jpg)
DF38602RFT10
Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet
1.DF38602RFT10.pdf
(554 pages)
Specifications of DF38602RFT10
Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10
HD64F38602RFT10
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
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Item
4.5.1 Note on Resonators and
Resonator Circuits
4.5.3 Definition of Oscillation
Stabilization Wait Time
Figure 4.12 Oscillation
Stabilization Wait Time
4.5.5 Note on the Oscillation
Stabilization of Resonators
4.5.6 Note on Using Power-On
Reset
Section 5 Power-Down Modes
5.1.3 Clock Halt Registers 1 and
2 (CKSTPR1 and CKSTPR2)
•
Table 5.3 Internal State in Each
Operating Mode
CKSTPR2
Page Revisions (See Manual for Details)
72
74
75
76
76
81
86
Resonator characteristics are closely related to board
Notes:
3. … When the watchdog timer stops operating and the
Notes:
Modified
design. Therefore, resonators should be assigned after
being carefully evaluated by the user in the masked
ROM version and flash memory version, with referring
to the examples shown in this section.
The description in this section is modified.
Modified
Oscillation waveform
(OSC2)
System clock (φ)
Operating mode
The title modified
Modified
The power-on reset circuit in this LSI adjusts the reset
clear time by the capacitor capacitance, which is
externally connected to the RES pin. The external
capacitor capacitance should be adjusted to secure the
oscillation stabilization time before reset clearing. For
details, refer to section 19, Power-On Reset Circuit.
The note is modified.
WDON bit is cleared to 0 by software, this bit is valid
and the watchdog timer enters module standby mode.
The note is modified.
6. Functions if the 32.768-kHz RTC is selected as an
internal clock. Halted and retained otherwise.
Oscillation
start time
Standby mode,
watch mode,
or subactive
mode
Rev. 3.00 May 15, 2007 Page 497 of 516
Interrupt accepted
Oscillation stabilization wait time
Wait time
REJ09B0152-0300
Active (high-speed) mode or
active (medium-speed) mode
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