DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 536

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Rev. 3.00 May 15, 2007 Page 502 of 516
REJ09B0152-0300
Item
5.3.6 Direct Transition from
Subactive Mode to Active
(Medium-Speed) Mode
Section 6 ROM
6.7 Notes on Setting Module
Standby Mode
Section 8 I/O Ports
8.1.5 Pin Functions
8.7.2 Input Characteristics
Difference due to Pin Function
P10/AEVH/FTIOA/TMOW/CL
KOUT pin
Page Revisions (See Manual for Details)
94
117
122
124
Added
When a SLEEP instruction is executed in subactive
mode while the SSBY and TMA3 bits in SYSCR1 are
set to 1, the LSON bit in SYSCR1 is cleared to 0, and
the MSON and DTON bits in SYSCR2 are set to 1, a
transition is made directly to active (medium-speed)
mode via watch mode after the waiting time set in bits
STS2 to STS0 in SYSCR1 has elapsed.
The time from the start of SLEEP instruction execution
to the end of interrupt exception handling (the direct
transition time) is calculated by equation (6).
Modified
… Then the flash memory should be set to enter the
module standby mode.
If an interrupt is generated in module standby mode,
the vector address cannot be fetched. As a result, the
program may run away.
Added
Note: * Switching the clock (φ
This section is newly added.
Example: When φw/8 and φosc/8 are selected as the
CPU operating clock before and after the transition,
respectively, and wait time = 8192 states
Direct transition time = (2 + 1) × 8tw + 8192 × 1tosc +
14 × 8tosc = 24tw + 8304tosc
For the legend of symbols used above, refer to
section 21, Electrical Characteristics.
CLKOUT output must be performed when
CLKOUT output is halted (CLKOUT = 0).
When making a transition to a power-down
mode wherein the system clock oscillator is
halted, the output level is retained. (In standby
mode, output is the high-impedance state.)
When making a transition from a power-down
mode wherein the system clock oscillator is
halted, to the active mode wherein the system
clock oscillator operates, halt CLKOUT output
(CLKOUT = 0) before the transition.
OSC
, φ
OSC
/2, or φ
OSC
/4) for

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