DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 132

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 5 Power-Down Modes
(2)
The case of falling edge capture is shown in figure 5.3.
As shown in the case marked "Capture not possible," when an external input signal falls
immediately after a transition to active mode or subactive mode, after oscillation is started by an
interrupt via a different signal, the external input signal cannot be captured if the high-level width
at that point is less than 2
(3)
To ensure dependable capture of an external input signal, high- and low-level signal widths of at
least 2
shown in "Capture possible: case 1."
External input signal capture is also possible with the timing shown in "Capture possible: case 2"
and "Capture possible: case 3," in which a 2
(4)
NMI, IRQ0, IRQ1, IRQAEC, and ADTRG
Rev. 3.00 May 15, 2007 Page 98 of 516
REJ09B0152-0300
Operating mode
φ or φSUB
Capture possible: case 1
Capture possible: case 2
Capture possible: case 3
Capture not possible
External input signal
When External Input Signals cannot be Captured because Internal Clock Stops
Recommended Timing of External Input Signals
Input Pins to which these Notes Apply
tcyc
or 2
tsubcyc
Figure 5.3 External Input Signal Capture when Signal Changes
are necessary before a transition is made to standby mode or watch mode, as
Active (high-speed, medium-speed)
mode or subactive mode
tcyc
before/after Standby Mode or Watch Mode
or 2
tcyc
tsubcyc
tsubcyc
.
tcyc
tsubcyc
tcyc
or 2
Standby mode or
watch mode
tsubcyc
level width is secured.
tcyc
tsubcyc
Interrupt by different signal
Wait for osc-
illation
stabilization
Active (high-speed, medium-speed)
mode or subactive mode
tcyc
tsubcyc

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