DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 75

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

Exception handling is caused by a reset, a trap instruction (TRAPA), or interrupts.
• Reset
• Trap Instruction
• Interrupts
A reset has the highest exception priority. Exception handling starts after the reset state is
cleared by a negation of the RES signal. Exception handling is also started when the watchdog
timer overflows. The exception handling executed at this time is the same as that for a reset by
the RES pin.
Exception handling starts when a trap instruction (TRAPA) is executed. A vector address
corresponding to a vector number from 0 to 3 which are specified in the instruction code is
generated. Exception handling can be executed at all times in the program execution state,
regardless of the setting of the I bit in CCR.
External interrupts other than the NMI and internal interrupts are masked by the I bit in CCR,
and kept pending while the I bit is set to 1. Exception handling starts when the current
instruction or exception handling ends, if an interrupt is requested.
Section 3 Exception Handling
Rev. 3.00 May 15, 2007 Page 41 of 516
Section 3 Exception Handling
REJ09B0152-0300