DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 362

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

Section 16 I
16.4
The I
by setting FS in SAR.
16.4.1
Figure 16.3 shows the I
following a start condition always consists of 8 bits.
[Legend]
S:
SLA: Slave address
R/W: Indicates the direction of data transfer: from the slave device to the master device when
A:
DATA: Transfer data
P:
Rev. 3.00 May 15, 2007 Page 328 of 516
REJ09B0152-0300
(a) I
(b) I
S
S
1
1
2
2
2
C bus format (FS = 0)
C bus format (Repeated start condition, FS = 0)
C bus interface 2 can communicate either in I
Start condition. The master device drives SDA from high to low while SCL is high.
R/W is 1, or from the master device to the slave device when R/W is 0.
Acknowledge. The receive device drives SDA to low.
Stop condition. The master device drives SDA from low to high while SCL is high.
SDA
SCL
Operation
SLA
SLA
7
7
2
C Bus Interface 2 (IIC2)
I
2
S
C Bus Format
1
1
R/W
R/W
1
1
SLA
1-7
2
C bus formats. Figure 16.4 shows the I
A
A
1
1
R/W
8
DATA
DATA
n1
n
Figure 16.3 I
Figure 16.4 I
9
A
m1
A
1
A/A
m
1
1-7
DATA
S
1
2
C Bus Formats
2
C Bus Timing
2
8
C bus mode or clock synchronous serial mode
SLA
A/A
1
7
A
9
n1 and n2: Transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: Transfer frame count (m1 and m2 ≥ 1)
P
1
1
2
R/W
C bus timing. The first frame
1
1-7
m: Transfer frame count
n: Transfer bit count
DATA
A
(n = 1 to 8)
1
(m ≥ 1)
8
DATA
n2
9
A
m2
P
A/A
1
1
P