DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 534

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Rev. 3.00 May 15, 2007 Page 500 of 516
REJ09B0152-0300
Item
5.3.2 Direct Transition from Active
(High-Speed) Mode to Subactive
Mode
5.3.3 Direct Transition from Active
(Medium-Speed) Mode to Active
(High-Speed) Mode
Page Revisions (See Manual for Details)
92
92
Added
When a SLEEP instruction is executed in active (high-
speed) mode while the SSBY, TMA3, and LSON bits in
SYSCR1 are set to 1 and the DTON bit in SYSCR2 is
set to 1, a transition is made to subactive mode via
watch mode.
The time from the start of SLEEP instruction execution
to the end of interrupt exception handling (the direct
transition time) is calculated by equation (2).
Added
When a SLEEP instruction is executed in active
(medium-speed) mode while the SSBY and LSON bits
in SYSCR1 are cleared to 0, the MSON bit in SYSCR2
is cleared to 0, and the DTON bit in SYSCR2 is set to
1, a transition is made to active (high-speed) mode via
sleep mode.
The time from the start of SLEEP instruction execution
to the end of interrupt exception handling (the direct
transition time) is calculated by equation (3).
Example: When φw/8 is selected as the subactive
operating clock after the transition
Direct transition time = (2 + 1) × 1tosc + 14 × 8tw =
3tosc + 112tw
For the legend of symbols used above, refer to
section 21, Electrical Characteristics.
Example: When φosc/8 is selected as the CPU
operating clock before the transition
Direct transition time = (2 + 1) × 8tosc + 14 × 1tosc =
38tosc
For the legend of symbols used above, refer to
section 21, Electrical Characteristics.

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