DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 20

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

16.4 Operation ........................................................................................................................... 328
16.5 Interrupt Request................................................................................................................ 345
16.6 Bit Synchronous Circuit..................................................................................................... 346
16.7 Usage Notes ....................................................................................................................... 347
Section 17 A/D Converter ................................................................................. 349
17.1 Features.............................................................................................................................. 349
17.2 Input/Output Pins............................................................................................................... 350
17.3 Register Descriptions......................................................................................................... 350
17.4 Operation ........................................................................................................................... 353
17.5 Example of Use.................................................................................................................. 354
17.6 A/D Conversion Accuracy Definitions .............................................................................. 357
17.7 Usage Notes ....................................................................................................................... 359
Section 18 Comparators .................................................................................... 361
18.1 Features.............................................................................................................................. 361
18.2 Input/Output Pins............................................................................................................... 362
Rev. 3.00 May 15, 2007 Page xviii of xxxii
16.4.1 I
16.4.2 Master Transmit Operation................................................................................... 329
16.4.3 Master Receive Operation .................................................................................... 331
16.4.4 Slave Transmit Operation ..................................................................................... 333
16.4.5 Slave Receive Operation....................................................................................... 336
16.4.6 Clock Synchronous Serial Format ........................................................................ 337
16.4.7 Noise Canceler...................................................................................................... 340
16.4.8 Example of Use..................................................................................................... 340
16.7.1 Note on Issuing Stop Condition and Start (Re-Transmit) Condition .................... 347
16.7.2 Note on Setting WAIT Bit in I2C Bus Mode Register (ICMR)............................ 347
16.7.3 Restriction on Transfer Rate Setting in Multimaster Operation ........................... 347
16.7.4 Restriction on the Use of Bit Manipulation Instructions for MST and
16.7.5 Usage Note on Master Receive Mode................................................................... 348
17.3.1 A/D Result Register (ADRR) ............................................................................... 350
17.3.2 A/D Mode Register (AMR) .................................................................................. 351
17.3.3 A/D Start Register (ADSR) .................................................................................. 352
17.4.1 A/D Conversion .................................................................................................... 353
17.4.2 External Trigger Input Timing.............................................................................. 353
17.4.3 Operating States of A/D Converter....................................................................... 354
17.7.1 Permissible Signal Source Impedance .................................................................. 359
17.7.2 Influences on Absolute Accuracy ......................................................................... 359
17.7.3 Usage Notes .......................................................................................................... 360
TRS Setting in Multimaster Operation................................................................. 348
2
C Bus Format...................................................................................................... 328