DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 402

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

Section 18 Comparators
18.5
1. The COMP pin whose channel is operating as a comparator becomes a comparator analog
2. When external input is used as the reference voltage (CMR0 = 1 or CMR1 = 1), the VCref pin
3. To stop the operation of a comparator, clear the CME0 and CME1 bits in CMCR0 and
4. If the LSI enters the standby mode or watch mode when a comparator is operating, the internal
Rev. 3.00 May 15, 2007 Page 368 of 516
REJ09B0152-0300
input pin. It cannot be used for any other function.
cannot be used for any other function.
CMCR1 to 0, before clearing the COMPCKSTP bit in CKSTPR2 to 0.
operation of the comparator is maintained. Since the comparator operates even in standby
mode or watch mode, it returns to the same mode after the specified interrupt is canceled,
though the current for the comparator is consumed.
If a comparator is not required to return to the standby mode or watch mode when an interrupt
is canceled and the current consumption needs to be reduced, stop the comparator by clearing
the CME0 and CME1 bits in CMCR0 and CMCR1 to 0 before shifting the mode.
Usage Notes
Clear I bit in CCR to 0
Set I bit in CCR to 1
Set CMIE bit to 1
Set CME bit to 1
Figure 18.4 Procedure for Setting Interrupt (2)
Read CDR bit
Clear CMF bit
Disable interrupts by the I bit.
Set the comparator enable bit to 1.
Wait for the comparator stabilized.
Enable the interrupt. Actually, the
interrupt is masked by the I bit.
The CDR bit is latched in the internal
latch by reading it.
Clear the interrupt request flag.
Enable interrupts by the I bit.