MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 437

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

MOTOROLA
19.7.2 DRESETEN
DRESETEN is asserted to indicate that the SDRAM controller is to be reset whenever
RSTI asserts. If DRESETEN is high, RSTI does not affect the SDRAM controller, which
continues to refresh external memory. This is useful for debug situations where a reset of
the device is required without losing data located in SDRAM. DRESETEN is normally tied
high or low depending on system requirements. It should never be tied to RSTI or RSTO.
19.7.3 CPU External Clock (CLKIN)
CLKIN should be connected to an external clock oscillator. The CLKIN input frequency
can range from DC to 66 MHz. The frequency input to this signal must be greater than twice
the frequency applied at E_Tx CLK. The clock frequency applied to CLKIN must exceed
24 MHz when the system uses a USB peripheral.
19.7.4 Reset Output (RSTO)
Reset output (RSTO) is driven low for 128 CPU clocks when the soft reset bit of the system
configuration register (SCR[SOFTRST]) is set. It is driven low for 32K CPU clocks when
the software watchdog timer times out or when a low input level is applied to RSTI.
19.8 Interrupt Request Inputs (INT[6:1])
The six interrupt request inputs (INT[6:1]) can generate separate, maskable interrupts on
negative edge (high to low) or positive edge (low to high) transitions. In addition to the
triggering edge being programmable, the priority can also be programmed. Each interrupt
input has a separate programmable interrupt level.
After a device reset, INT[4:1] are enabled but the function is masked. INT4/DIN3 function
can be changed by software. INT[3:1] functions are always assigned to dedicated pins.
Interrupts INT[6:4] are multiplexed with other functions as follows:
INT1 is also internally connected to the USC_WOR function.
The INT6 function is always available regardless of the other functions enabled on this pin.
19.9 General-Purpose I/O (GPIO) Ports
Each of the three GPIO ports is 16 bits wide. Each port line can be individually configured
as input or output. Except where indicated, each pin function is independently selectable
• DGNT1_INT6/PA15_INT6
• INT5/URT1_RTS
• INT4/DIN3
Chapter 19. Signal Descriptions
Interrupt Request Inputs (INT[6:1])
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