MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 431

PROCESSOR MODULE FLASH MOD5272

MOD5272-100IR

Manufacturer Part Number

MOD5272-100IR

Description

PROCESSOR MODULE FLASH MOD5272

Manufacturer

NetBurner Inc

Type

Controllers & Processorsr

Datasheets

1.MOD5272-100IR.pdf (2 pages)

2.MOD5272-100IR.pdf (3 pages)

3.MOD5272-100IR.pdf (550 pages)

Specifications of MOD5272-100IR

Module/board Type

Processor Module

Ethernet Connection Type

10/100 Ethernet Port RJ-45

Operating Voltage

3.3 V

Product

Modules

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With/related Products

MOD5272

For Use With

528-1001 - KIT DEVELOP NETWORK FOR MOD5272

Lead Free Status / Rohs Status

Lead free / RoHS Compliant

Other names

528-1008

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MOTOROLA

BGA

Map

M14

N10

N11

N12

N13

N14

Pin

N1

N2

N3

N4

N5

N6

N7

N8

N9

P1

P2

P3

P4

P5

P6

P7

P8

PWM_OUT0

DRESETEN

QSPI_Dout/

Table 19-2. Signal Name and Description by Pin Number (Continued)

E_RxCLK

QSPI_Din

0 (Reset)

E_MDIO

E_RxD0

E_TxEN

E_TxD0

DOUT1

E_COL

High Z

High Z

WSEL

CLKIN

PB12

DIN1

INT3

INT2

VDD

PB8

CS3

PA7

HIZ

QSPI_CS3

Pin Functions

E_RxD2

E_TxD3

PWM_

+3.3V

OUT1

1

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

Chapter 19. Signal Descriptions

DOUT3

TOUT1

DIN3

2

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

INT4

3

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

–

PA7/QSPI_CS3/DOUT3

PWM_OUT1/TOUT1

QSPI_Dout / WSEL

PB12/E_RxD2

PB8/E_TxD3

PWM_OUT0

DRESETEN

DIN3/INT4

QSPI_Din

E_RxCLK

E_MDIO

E_RxD0

E_TxEN

E_TxD0

DOUT1

E_COL

CLKIN

Name

DIN1

INT3

INT2

CS3

HiZ

CPU external clock

input

PLIC ports 1, 2, 3 data

output

PLIC ports 1, 2, 3 data

input

Interrupt input 3

QSPI data output/Bus

width selection

PWM output compare 0

Ethernet Tx data

Ethernet Rx clock

Port B bit 8/Tx data bit 3

(100 Base-T Ethernet

only)

Port B bit 12/Rx data bit

2 (100 Base-T Ethernet

only)

Management channel

serial data (100 base-T

only)

Chip select 3

DRAM controller reset

enable

High impedance enable

PA7/QSPI chip select

4/PLIC port 3 data

output

Interrupt 4 input/PLIC

port 3 data input

Interrupt input 1

QSPI data input

PWM output compare 1

/Timer 1 output

compare

Collision

Ethernet Rx data

Ethernet Tx enable

Description

Signal List

19-17

I/O

I/O

I/O

I/O

I/O

I/O

O

O

O

O

O

O

I

I

I

I

I

I

I

I

I

I

I

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