MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 143

PROCESSOR MODULE FLASH MOD5272

MOD5272-100IR

Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5272-100IR

Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
MOTOROLA
The sequence is as follows:
• In cycle 1, the development system command is issued (
• In cycle 2, the development system supplies the high-order 16 address bits. The
• In cycle 3, the development system supplies the low-order 16 address bits. The
• At the completion of cycle 3, the debug module initiates a memory read operation.
COMMANDS TRANSMITTED TO THE DEBUG MODULE
RESPONSES FROM THE DEBUG MODULE
READ (LONG)
debug module responds with either the low-order results of the previous command
or a command complete status of the previous command, if no results are required.
debug module returns a not-ready response unless the received command is decoded
as unimplemented, which is indicated by the illegal command encoding. If this
occurs, the development system should retransmit the command.
debug module always returns a not-ready response.
Any serial transfers that begin during a memory access return a not-ready response.
???
RESULTS FROM PREVIOUS COMMAND
COMMAND CODE TRANSMITTED DURING THIS CYCLE
A not-ready response can be ignored except during a
memory-referencing cycle. Otherwise, the debug module can
accept a new serial transfer after 32 processor clock periods.
SEQUENCE TAKEN IF
ILLEGAL COMMAND
IS RECEIVED BY DEBUG MODULE
"NOT READY"
Figure 5-16. Command Sequence Diagram
MS ADDR
"ILLEGAL"
XXX
HIGH-ORDER 16 BITS OF MEMORY ADDRESS
Chapter 5. Debug Support
DATA UNUSED FROM
THIS TRANSFER
"NOT READY"
"NOT READY"
NEXT CMD
LS ADDR
LOW-ORDER 16 BITS OF MEMORY ADDRESS
NOTE:
LOCATION
MEMORY
READ
NONSERIAL-RELATED ACTIVITY
HIGH- AND LOW-ORDER
16 BITS OF RESULT
Background Debug Mode (BDM)
READ
ERROR OCCURS ON
SEQUENCE TAKEN IF
OPERATION HAS NOT
COMPLETED
SEQUENCE TAKEN IF BUS
MEMORY ACCESS
"NOT READY"
MS RESULT
XXX
XXX
XXXXX
BERR
XXX
in this example). The
"NOT READY"
COMMAND
NEXT CMD
LS RESULT
NEXT CMD
NEXT
CODE
5-21

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