MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 383

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

MOTOROLA
16.5.2 Transmitter and Receiver Operating Modes
Figure 16-24 is a functional block diagram of the transmitter and receiver showing the
command and operating registers, which are described generally in the following sections
and described in detail in Section 16.3, “Register Descriptions.”
16.5.2.1 Transmitting
The transmitter is enabled through the UART command register (UCRn). When it is ready
to accept a character, the UART sets USRn[TxRDY]. The transmitter converts parallel data
from the CPU to a serial bit stream on TxD. It automatically sends a start bit followed by
the programmed number of data bits, an optional parity bit, and the programmed number
of stop bits. The lsb is sent first. Data is shifted from the transmitter output on the falling
edge of the clock source.
After the stop bits are sent, if no new character is in the transmitter holding register, the TxD
output remains high (mark condition) and the transmitter empty bit, USRn[TxEMP], is set.
Transmission resumes and TxEMP is cleared when the CPU loads a new character into the
UART transmitter buffer (UTBn). If the transmitter receives a disable command, it
continues until any character in the transmitter shift register is completely sent.
If the transmitter is reset through a software command, operation stops immediately (see
Section 16.3.5, “UART Command Registers (UCRn)”). The transmitter is reenabled
through the UCRn to resume operation after a disable or software reset.
UART Transmit
UART Transmit
FIFO (URB)
FIFO (URB)
(24 Bytes)
(24 Bytes)
Figure 16-24. Transmitter and Receiver Functional Diagram
Receiver FIFO
UART Command Register (UCR0)
UART Mode Register 1 (UMR1)
UART Mode Register 2 (UMR2)
UART Status Register (USR0)
Transmitter FIFO
Receiver Shift Register
Transmitter Shift Register
Chapter 16. UART Modules
UART
R/W
R/W
R
W
W
R
Operation
External
Interface
16-23
RXD
TXD