MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 155

PROCESSOR MODULE FLASH MOD5272

MOD5272-100IR

Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5272-100IR

Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
MOTOROLA
Command/Result Formats:
Table 5-20 shows the definition of DRc encoding.
Command Sequence:
Operand Data:
Result Data:
5.5.3.3.12 Write Debug Module Register (
The operand (longword) data is written to the specified debug module register. All 32 bits
of the register are altered by the write. DSCLK must be inactive while the debug module
register writes from the CPU accesses are performed using the WDEBUG instruction.
Command Format:
Table 5-3 shows the definition of the DRc write encoding.
15
Command
0x01–0x1F
DRc[4:0]
0x00
Result
0x2
15
Figure 5-37.
12
Debug Register Definition
0x2
Table 5-20. Definition of DRc Encoding—Read
Figure 5-39.
Configuration/Status
None
The contents of the selected debug register are returned as a
longword value. The data is returned most-significant word first.
Figure 5-38.
11
Reserved
RDMREG
12
???
RDMREG BDM
11
0xC
Chapter 5. Debug Support
WDMREG
RDMREG
0xD
8
D[31:16]
D[15:0]
MS RESULT
BDM Command Format
"ILLEGAL"
Command/Result Formats
Command Sequence
XXX
XXX
D[31:16]
8
D[15:0]
7
Mnemonic
WDMREG
7
CSR
100
100
"NOT READY"
LS RESULT
NEXT CMD
NEXT CMD
5
)
Background Debug Mode (BDM)
5
4
Initial State
4
0x0
DRc
DRc
p. 5-9
Page
0
5-33
0

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