MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 277
![PROCESSOR MODULE FLASH MOD5272](/photos/6/75/67555/mod5272-100ir_sml.jpg)
MOD5272-100IR
Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(2 pages)
2.MOD5272-100IR.pdf
(3 pages)
3.MOD5272-100IR.pdf
(550 pages)
Specifications of MOD5272-100IR
Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
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MOTOROLA
Table 12-12 lists field descriptions for the USB endpoint 0 control register.
31–19
Bits
18
17
16
15
14
13
12
11
BUS_PWR
WOR_LVL
CLK_SEL
WOR_EN
RESUME
USB_EN
AFE_EN
DEBUG
Name
—
Reserved, should be cleared.
Debug mode. Enters debug mode. Debug mode enables CRC error generation and
notification of a change of address.
0 Normal operation
1 Enable debug mode functions
Wake-on-ring level select. Selects the active level of INT1 for the wake-on-ring function.
0 Wake-on-ring function is invoked when INT1 pin is 0.
1 Wake-on-ring function is invoked when INT1 pin is 1.
Wake-on-ring enable. Generates a RESUME when the active level is detected on INT1
pin.
0 Wake-on-ring function disabled
1 Wake-on-ring function enabled
Note: the wake-on-ring function generates a RESUME only if the USB module is enabled
for remote wakeup by the host, for example, WAKE_ST = 1, and is suspended.
Clock source selection. Overrides the clock source for the USB module. If the
USB_ExtCLK pin is selected after reset, setting this bit forces the USB module to use the
internal system clock.
0 Clock is retrieved from the clock selected at reset.
1 Clock is retrieved from the internal system clock.
Note: the selected clock must have a frequency of 48 MHz.
Generates RESUME condition. Used to exit the SUSPEND state. The USB control logic
ensures the forced resume duration is greater than 10 ms. This command bit is write-only
and always returns 0 when read.
0 Default
1 Generate RESUME condition (force data lines to K state)
Note: this command generates a RESUME only if the USB is both suspended and
enabled for remote wakeup by the host, that is, USBEPSR0[WAKE_ST] = 1.
External USB analog front-end enable. Used to select the internal or external USB
analog front end (AFE). The internal AFE is selected by default.
0 The USB internal AFE is powered up and the external transceiver interface is disabled.
1 The USB internal AFE is powered down and the external transceiver interface is
Select bus-powered mode. Used to select between bus-powered and self-powered
mode. This bit only affects the response to a GET_STATUS device request. This bit
should be set according to the current configuration.
0 Self-powered mode
1 Bus-powered mode
Enables and disables the USB control logic. Has no effect on USB register values. When
cleared, the outputs are high impedance, preventing any response to the host. This bit
should be set after USB module registers are initialized and the descriptors are copied
into the configuration RAM.
0 Disable USB module
1 Enable USB module
The driven outputs can be observed on the parallel port A signals if they are configured
for USB.
enabled. The internal transceiver outputs, (USBH and USBL), are high impedance.
Table 12-12. EP0CTL Field Descriptions
Chapter 12. Universal Serial Bus (USB)
Register Description and Programming Model
Description
12-17
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