MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 252

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

Programming Model
11.5.19 Pointer-to-Receive Descriptor Ring (ERDSR)
This register, Figure 11-23, provides a pointer to the start of the circular receive buffer
descriptor queue in external memory. This pointer must be long-word aligned. However, it
is recommended it be aligned on a 16-byte boundary (address evenly divisible by 16) in
order to improve bus utilization. Bits 1 and 0 should be written to 0 by the user. Non-zero
values in these two bit positions are ignored by the hardware.
This register is not reset and must be initialized by the user prior to operation.
11.5.20 Pointer-to-Transmit Descriptor Ring (ETDSR)
This register provides a pointer to the start of the circular transmit buffer descriptor queue
in external memory. This pointer must be long-word aligned. However, it is recommended
it be aligned on a 16 byte boundary (address evenly divisible by 16) in order to improve bus
utilization. Bits 1 and 0 should be set to 0 by the user. Non-zero values in these two bit
positions are ignored by the hardware.
This register is not reset and must be initialized by the user prior to operation.
11-28
Reset
Reset
Field
Field
Addr
R/W
R/W
31–2
Bits
1–0
31–0
Bits
31
15
R_DES_START
Figure 11-23. Pointer to Receive Descriptor Ring (ERDSR)
HASH_LOW
Name
Name
—
Table 11-27. ERDSR Field Descriptions
Table 11-26. HTLR Field Descriptions
The HTLR register contains the lower 32 bits of the 64-bit hash table used in the
address recognition process for receive frames with a multicast address.
Bit 31 of HTLR contains hash index bit 31.
Bit 0 of HTLR contains hash index bit 0.
Pointer to start of receive buffer descriptor queue.
Reserved, should be cleared.
MCF5272 User’s Manual
R_DES_START
R_DES_START
MBAR + 0xC10
Read/Write
Read/Write
Undefined
Undefined
Description
Description
2
MOTOROLA
0
1
16
0
0