MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 162
![PROCESSOR MODULE FLASH MOD5272](/photos/6/75/67555/mod5272-100ir_sml.jpg)
MOD5272-100IR
Manufacturer Part Number
MOD5272-100IR
Description
PROCESSOR MODULE FLASH MOD5272
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(2 pages)
2.MOD5272-100IR.pdf
(3 pages)
3.MOD5272-100IR.pdf
(550 pages)
Specifications of MOD5272-100IR
Module/board Type
Processor Module
Ethernet Connection Type
10/100 Ethernet Port RJ-45
Operating Voltage
3.3 V
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MOD5272
For Use With
528-1001 - KIT DEVELOP NETWORK FOR MOD5272
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
528-1008
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Processor Status, DDATA Definition
1
2
3
Exception Processing PST = 0xC, {PST = 0xB,DD = destination}, // stack frame
The PST/DDATA specification for the reset exception is shown below:
Exception Processing PST = 0xC,
5-40
For JMP and JSR instructions, the optional target instruction address is displayed only for those effective
address fields defining variant addressing modes. This includes the following <ea>x values: (An), (d16,An),
(d8,An,Xi), (d8,PC,Xi).
For Move Multiple instructions (MOVEM), the processor automatically generates line-sized transfers if the
operand address reaches a 0-modulo-16 boundary and there are four or more registers to be transferred. For
these line-sized transfers, the operand data is never captured nor displayed, regardless of the CSR value.
The automatic line-sized burst transfers are provided to maximize performance during these sequential
memory access operations.
During normal exception processing, the PST output is driven to a 0xC indicating the exception processing
state. The exception stack write operands, as well as the vector read and target address of the exception
handler may also be displayed.
Instruction
Table 5-22. PST/DDATA Specification for User-Mode Instructions (Continued)
wddata.w
wddata.b
wddata.l
remu.l
rems.l
subq.l
subx.l
pulse
subi.l
swap
sub.l
sub.l
trapf
tst.w
tst.b
unlk
pea
trap
scc
tst.l
rts
Operand Syntax
<ea>y,Dx:Dw
<ea>y,Dx:Dw
#imm,<ea>x
<ea>y,Rx
Dy,<ea>x
#imm,Dx
<ea>y
<ea>x
<ea>x
<ea>x
<ea>y
<ea>y
<ea>y
Dy,Dx
#imm
Dx
Dx
Ax
PST = 0x5, {PST = [0x9AB],DD = target}
PST = 0x5, {PST = [0x9AB],DD = target}
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x4
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source operand},
PST = 0x5, {PST = [0x9AB], DD = target address}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0x8, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x4, {PST = 0x8, DD = source operand
PST = 0x4, {PST = 0xB, DD = source operand
PST = 0x4, {PST = 0x9, DD = source operand
MCF5272 User’s Manual
3
{PST = 0xB,DD = destination}, // stack frame
{PST = 0xB,DD = source},
PST/DDATA
// handler PC
// vector read
// handler PC
MOTOROLA
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