MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 258

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

Buffer Descriptors
11.6.1.2 Ethernet Transmit Buffer Descriptor
Data is presented to the FEC for transmission by arranging it in buffers referenced by the
channel’s TxBDs. The FEC confirms transmission or indicates error conditions using the
BDs to inform the host that the buffers have been serviced. In the TxBD, the user initializes
the R, W, L, and TC bits and the length (in bytes) in the first word and the buffer pointer in
the second words.
If L = 0, then the FEC sets the R bit to 0 in the first word of the BD when the buffer is sent
as a DMA. Status bits are not modified.
If L = 1, then the FEC sets the R bit to 0 and will modify the DEF, HB, LC, RL, RC, UN,
and CSL status bits in the first word of the BD after the buffer is sent as a DMA, and frame
transmission is complete.
11-34
+0
+2
+4
+6
Offset
Offset
Bits
+ 2
+ 4
4
3
2
1
0
15
R
Rx Buffer
Length
Pointer
Name
Data
NO
SH
CR
OV
TR
TO1
14
Anytime the software driver sets an E bit in a receive
descriptor, the driver should immediately write to RDAR.
Rx non-octet-aligned frame. Written by the FEC. A frame that contained a number of bits not
divisible by 8 was received, and the CRC check that occurred at the preceding byte boundary
generated an error. Valid only if the L-bit is set. If this bit is set, the CR bit is not set.
Short frame. Written by the FEC. A frame length that was less than the minimum defined for
this channel was recognized. The FEC does not support SH and this bit is always cleared.
Rx CRC error. Written by the FEC. Contains a CRC error and is an integral number of octets in
length. Valid only if the L-bit is set.
Overrun. Written by the FEC. A receive FIFO overrun occurred during frame reception. If this
bit is set, the other status bits, M, LG, NO, SH, CR, and CL, lose their normal meaning and are
zero. Valid only if the L-bit is set.
Truncated receive frame. Written by the FEC. Set if the receive frame is truncated. Frames
greater than or equal to 2048 bytes are truncated.
Written by the FEC. Data length is the number of octets written by the FEC into this BD’s data
buffer if L = 0 (the value is equal to EMRBR), or the length of the frame including CRC if L = 1.
It is written by the FEC once as the BD is closed.
Written by the user. The receive buffer pointer, which always points to the first location of the
associated data buffer, must always be evenly divisible by 16. The buffer must reside in
memory external to the FEC.
Table 11-34. RxBD Field Descriptions (Continued)
13
W
Figure 11-27. Transmit Buffer Descriptor (TxBD)
TO2
12
11
L
TC
10
MCF5272 User’s Manual
Tx Data Buffer Pointer A[31–16]
Tx Data Buffer Pointer A[15–0]
DEF
9
NOTE:
DATA LENGTH
HB
8
Description
LC
7
RL
6
5
RC
2
MOTOROLA
UN
1
CSL
0