MOD5272-100IR NetBurner Inc, MOD5272-100IR Datasheet - Page 156

• Manufacturer Part Number: MOD5272-100IR
• Description: PROCESSOR MODULE FLASH MOD5272
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5272-100IR

• Module/board Type: Processor Module
• Ethernet Connection Type: 10/100 Ethernet Port RJ-45
• Operating Voltage: 3.3 V
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: MOD5272
• For Use With: 528-1001 - KIT DEVELOP NETWORK FOR MOD5272
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 528-1008

Real-Time Debug Support
Command Sequence:
Operand Data:
Result Data:
5.6 Real-Time Debug Support
The ColdFire Family provides support debugging real-time applications. For these types of
embedded systems, the processor must continue to operate during debug. The foundation
of this area of debug support is that while the processor cannot be halted to allow
debugging, the system can generally tolerate small intrusions into the real-time operation.
The debug module provides three types of breakpoints—PC with mask, operand address
range, and data with mask. These breakpoints can be configured into one- or two-level
triggers with the exact trigger response also programmable. The debug module
programming model can be written from either the external development system using the
debug serial interface or from the processor’s supervisor programming model using the
WDEBUG instruction. Only CSR is readable using the external development system.
5.6.1 Theory of Operation
Breakpoint hardware can be configured to respond to triggers in several ways. The response
desired is programmed into TDR. As shown in Table 5-21, when a breakpoint is triggered,
an indication (CSR[BSTAT]) is provided on the DDATA output port when it is not
displaying captured processor status, operands, or branch addresses.
5-34
1
Encodings not shown are reserved for future use.
Table 5-21. DDATA[3:0]/CSR[BSTAT] Breakpoint Response
DDATA[3:0]/CSR[BSTAT]
WDMREG
???
Figure 5-40.
Longword data is written into the specified debug register. The data
is supplied most-significant word first.
Command complete status (0xFFFF) is returned when register write
is complete.
0000/0000
0010/0001
0100/0010
1010/0101
1100/0110
"NOT READY"
MCF5272 User’s Manual
"ILLEGAL"
MS DATA
WDMREG
XXX
1
Command Sequence
"NOT READY"
"NOT READY"
NEXT CMD
LS DATA
No breakpoints enabled
Waiting for level-1 breakpoint
Level-1 breakpoint triggered
Waiting for level-2 breakpoint
Level-2 breakpoint triggered
Breakpoint Status
"CMD COMPLETE"
NEXT CMD
MOTOROLA